This Verilog project is to present a full Verilog code for Sequence Detector using Moore FSM. A Verilog Testbench for the Moore FSM sequence detector is also provided for simulation. The Moore FSM keeps detecting a binary sequence from a digital input and the output of the FSM goes high only when a 00011100 sequence is detected.
To design a sequence detector Moore Machine using D flip flop.
- Akshay Mishra
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