Introduction
This Verilog project is to present a full Verilog code for Sequence Detector using Moore FSM. A Verilog Testbench for the Moore FSM sequence detector is also provided for simulation. The Moore FSM keeps detecting a binary sequence from a digital input and the output of the FSM goes high only when a 00011100 sequence is detected.
Aim
To design a sequence detector Moore Machine using D flip flop.
Team
- Akshay Mishra
Moore
melay
dsd
Hello users, I am the cofounder of thesocialcomment. If you are reading this, you must be curious about things and we respect that.
Can you explain why you use parameters in your code as i am new bie so i have to learn :)